1. Field of the Invention
This invention relates to digital-to-analog converters of the type including a plurality of current sources connected to a current-dividing network arranged to set the current contribution from each current source. In an embodiment of this invention described hereinbelow, such a digital-to-analog converter is incorporated as part of a successive-approximation analog-to-digital converter providing improved performance capability.
2. Description Of The Prior Art
Digital-to-analog converters have been used for years in numerous applications. Such converters are, for example, used in successive-approximation analog-to-digital converters which are frequently employed for interfacing with digital computers because they have both high resolution and high-speed capabilities. In successive-approximation converters the unknown analog input is compared with the output of the digital-to-analog converter (often called a DAC), and the results of the comparison are used to control the switches of the DAC until its output matches the unknown analog input.
In carrying out such conversion, the switches of the DAC are controlled by conventional step-by-step sequencer devices, and at each step the comparison between the DAC output and the analog input controls the binary state of corresponding register stages in which the digital output signal is developed. (The nature of this operation is now well known, as described for example at page II-81 of the "A D Conversion Handbook" published by Analog Devices, Inc., of Norwood, Mass.). When the final match has been achieved between the analog input and the DAC output, the digital signal stored in the registers of the DAC represents in digital format the magnitude of the unknown analog input signal, and serves as the digital output signal of the analog-to-digital converter.
Digital-to-analog converters for successive-approximation analog-to-digital converters often have been of the type using a series of independently switchable current sources, especially sources producing currents of identical magnitude. In such case, the binary weighting of the switchable sources typically is effected by a so-called "R-2 R" ladder network. Such a ladder network comprises a string of series-connected resistors of resistance R the junctions of which are connected through shunt resistors of resistance 2 R to a common terminal of the ladder. The current sources are connected to respective junctions of the series resistors, and the composite output current is derived from a ladder output terminal at one end of the string of series resistors. (Further details of such ladder networks can be found in the above-mentioned Handbook, starting at page II-36. )
Conventionally, in a current-comparison type of analog-to-digital converter, the unknown analog input voltage is connected through an input resistor (R.sub.in ) to one input terminal of a comparator, to supply to that terminal a current proportional to the unknown analog voltage. The ladder output current also is supplied to that comparator terminal, in opposition to the analog input current, and the other comparator terminal is connected to ground (sometimes referred to as the "sense ground" in accordance with established grounding terminology). The comparator output is a logical "1" or "0" in accordance with whether the ladder output current is larger or smaller than the analog input current.
Although such ladder network arrangements have provided important advantages in the design of converters, they have introduced certain problems which have prevented the achievement of desired performance characteristics. For example, the current flowing through the ladder common terminal necessarily passes through a series lead resistance so as to introduce an extraneous voltage drop which varies with the digital word set up in the DAC. This variable voltage drop alters the effective potential applied to the resistors of the ladder, and thereby alters the division of current between the ladder output and the ladder common. This voltage drop cannot readily be compensated for because the current through the common terminal is not simply related to the magnitude of the digital word. Still another problem results from the relatively low internal impedance of a ladder network when using resistors of convenient size, since there is an effective gain loss when such a ladder network is coupled to an analog input resistor (R.sub.in ) properly sized for high-speed conversion operations. As one specific illustration, an R-2 R network composed of 500 ohm series resistors and 1 K ohm shunt resistors will have an effective series internal resistance of 1 K ohms, so that when used with an input resistor of 2.5 K ohms, to produce 4 ma of current with an input signal of 10 volts, the gain loss will be 3.5:1.
The problems discussed above are significantly minimized by novel features of the apparatus to be described hereinbelow.